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早稲田大学ＩＴ研究機構＞プロジェクト＞システムＬＳＩ研究所《概要》＞活動報告（2008年度・成果発表）

プロジェクト研究所 《活動報告》

システムLSI研究所

≪２００８年度≫

■成果発表

・国際学会および主要な国内学会発表

　招待講演１件（国内１件）

　口頭講演７４件（国内２７件、国際４７件）

<招待講演：国内１件>
  1. 池永　剛、”メディア処理応用からの機能集積情報システムの実現”, 電子情報通信学会第38回機能集積情報システム研究会, Mar. 2009 (特別講演)


<口頭講演：国内２７件、国際４７件>

【国内】
  1. 齊藤啓太, 戸川望, 柳澤政生, 大附辰夫, "連携処理を考慮したネットワークプロセッサへの処理割り当て手法," 信学技報, VLD2008-151, 2009年3月


  2. 脇田慎吾, 戸川望, 柳澤政生, 大附辰夫, "Odd-Even Turn Modelを対象としたNoCの負荷分散による遅延時間削減手法," 信学技報, VLD2008-152, 2009年3月


  3. 坂寄貴宏、池永　剛、"実時間KLT Tracker向きハードウェアエンジンの実現", 電子情報通信学会画像工学研究会, Mar. 2009


  4. 坂寄貴宏、河根広大、池永　剛, "実時間KLT Trackerの特徴点追跡ハードウェアの実現", 電子情報通信学会総合大会, D-12-27, Mar. 2009


  5. 河根広大、坂寄貴宏、池永　剛, "実時間KLT Trackerの特徴点抽出ハードウェアの実現", 電子情報通信学会総合大会, D-12-28, Mar. 2009


  6. Zhewen Zheng, Takeshi Ikenaga, Qin Liu, Yiqing Huang, "An Edge Information Based Block Size Decision Method for Intra Mode Decision in H.264/AVC", 電子情報通信学会総合大会, D-11-18, Mar. 2009


  7. Yiqing Huang, Qin Liu, Takeshi Ikenaga, "Multi-Stage Based Inter Mode Decision Algorithm in H.264/AVC", 電子情報通信学会総合大会, D-11-19, Mar. 2009


  8. Qin Liu, Yiqing Huang, Takeshi Ikenaga, "Bayesian Decision Based All-Zero Block Detection Algorithm in H.264/AVC", 電子情報通信学会総合大会, D-11-20, Mar. 2009


  9. Shuijiong Wu, Yiqing Huang, Qin Liu, Takeshi Ikenaga, "Macroblock Level Rate Control for H.264/AVC Based on Model Parameter Update and Weighted Reference Calculation", 電子情報通信学会総合大会, D-11-21, Mar. 2009


  10. Jingbang Qiu, Tianci Huang, Takeshi Ikenaga, "1D-based 2D Gaussian Convolution Unit Based Hardware Accelerator for Gaussian & DoG Pyramid Construction in SIFT", 電子情報通信学会総合大会, D-12-69, Mar. 2009


  11. Tian ci Huang, Jing bang Qiu, Takeshi Ikenaga, "A GMM based Foreground Extraction Algorithm in Complex Background for Surveillance System", 電子情報通信学会総合大会, D-12-96, Mar. 2009


  12. 牛木 慎祐、中村 浩一、清水 一範、王 棋、阿部 裕太、後藤 敏、池永 剛, "LDPC符号化OFDM-UWB方式に基づく820Mb/s ベースバンド処理LSI", 電子情報通信学会集積回路研究会, Jan. 2009


  13. 佐藤亘, 大智輝, 戸川望, 柳澤政生, 大附辰夫, “フロアプランを考慮した高位合成のための高速なモジュール配置手法,” 電子情報通信学会 技術研究報告 2009年1月


  14. 渡辺隆行, 戸川望, 柳澤政生, 大附辰夫, “アプリケーションプロセッサのための高速かつ最適なパイプライン構成を持つSIMD演算ユニット合成手法,” 電子情報通信学会 技術研究報告 2009年1月


  15. 小林優太, 戸川望, 柳澤政生, 大附辰夫, “命令メモリアクセス数削減に基づく低エネルギーASIP合成手法,” 電子情報通信学会 技術研究報告 2009年1月


  16. 東條信明, 戸川望, 柳澤政夫, 大附辰夫, “組み込みシステムの2階層キャッシュとスクラッチパッドメモリのシミュレーション手法,” 電子情報通信学会 技術研究報告, vol. 108, no. 298, VLD2008-76, pp. 97-102, 2008年11月


  17. 長島諒侑, 今井優太, 戸川望, 柳澤政生, 大附辰夫, “高効率列処理演算器によるマルチレート対応高スループットイレギュラーLDPC復号器の実装と評価,” 電子情報通信学会 技術研究報告, vol. 108, no. 298, VLD2008-66, pp. 37-42, 2008年11月


  18. 遠藤哲弥, 大智輝, 戸川望, 柳澤政生, 大附辰夫, “レジスタ分散型アーキテクチャを対象としたフロアプラン指向高位合成のためのマルチプレクサ削減手法,” 電子情報通信学会 技術研究報告, vol. 108, no. 298, VLD2008-84, pp. 145-150, 2008年11月


  19. 松永多苗子, 木村晋二, 松永裕介, “FPGAを対象とした部分積加算回路の合成について,” 情処研報告 2008-SLDM-136, pp.59-63, Oct. 2008


  20. Wenqi YOU, Xianghui WEI, Yang SONG, Takeshi IKENAGA, Satoshi GOTO, “A Novel Hardware-Friendly Regular 3-Step Integer Motion Estimation Algorithm for H.264/AVC”, 2008年電子情報通信学会通信ソサイエティ大会, 通信講演論文集2, BS-12-18, S-152, Sep. 2008


  21. Guifen Tian, Tianruo Zhang, Takeshi Ikenaga, Satoshi Goto, “A Fast Block Type Decision Algorithm for H.264/AVC Intra Prediction”, 2008年電子情報通信学会通信ソサイエティ大会, 通信講演論文集2, BS-12-19，S153, Sep. 2008


  22. 大智輝, 戸川望, 柳澤政生, 大附辰夫, "マルチサイクル配線遅延を考慮したフロアプラン指向高位合成手法", 情報処理学会 DAシンポジウム 2008, pp.109-114, 2008年8月


  23. 松永多苗子, 木村晋二, 松永裕介, "スイッチング確率を考慮したprefix graph合成手法の改良について," 情処研報告 2008-SLDM-135, pp.31-36, May 2008


  24. Tianruo ZHANG, Guifen TIAN, Takeshi IKENAGA, Satoshi GOTO, "A Novel Fast Block Type Decision Algorithm for Intra Prediction in H.264/AVC High Profile", The 21st Workshop on Circuits and Systems in Karuizawa, Japan, pp.121-125, Apr.2008


  25. Yibo FAN, Takeshi IKENAGA, Yukiyasu TSUNOO, Satoshi GOTO, "A Low-cost LSI design of AES against DPA attack by hiding power information", The 21th workshop on circuits and systems in karuizawa, Japan, pp,271-274 Apr.2008


  26. Song Chen, Liang-Wei Ge, Mei-Fang Chiang and T.Yoshimura, "Lagrangian Relaxation Based Inter-Layer Signal Via Assignment for 3-D ICs", Proc. 21st Circuits and Systems Karuizawa Workshop, pp581-586, 2008.4


  27. 東條信明, 戸川望， 柳澤政生， 大附辰夫, "アプリケーションプロセッサのL1キャッシュ最適化手法", 第21回 回路とシステム 軽井沢ワークショップ, 2008年4月


【国際】
  1. Minghui Wang, Tianruo Zhang, Chen Liu, Satoshi Goto, "Region-of-Interest Based H.264 Encoding Parameter Allocation for Low Power Video Communication", The 5th International Colloquium on Signal Processing and its Applications(CSPA2009), Mar.2009


  2. Chen Liu, Tianruo Zhang, Xin Jin, Satoshi Goto, "An Inter Mode Decision Method with Motion Correlation Adaptation for H.264/AVC", The 5th International Colloquium on Signal Processing and its Applications(CSPA2009), Mar.2009


  3. Zhenxing CHEN, Satoshi GOTO, "OBJECT’S MOVING SPEED BASED MODEL FOR DECIDING VIDEO SEQUENCES’S BENCHMARK SEARCH RANGE IN VIDEO CODING", The 5th International Colloquium on Signal Processing and its Applications(CSPA2009), Mar.2009


  4. Zhao Min, Xin Jin, Satoshi Goto, "Novel Real-time Rate Control Algorithm for Constant Quality H.264/AVC High Vision Codec", The 5th International Colloquium on Signal Processing and its Applications(CSPA2009), Mar.2009


  5. Jingbang Qiu, Takeshi Ikenaga, Tianci Huang, "Hardware Accelerator for Feature Point Detection Part of SIFT Algorithm & Corresponding Hardware-Friendly Modification", The 15th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2009), Mar. 2009


  6. Yiqing Huang, Qin Liu, Takeshi Ikenaga, "VLSI Oriented Fast Motion Estimation Algorithm Based on Macroblock and Motion Feature Analysis”, The 5th International Colloquium on Signal Processing and its Applications (CSPA 2009), Mar. 2009


  7. Tianci Huang, Jingbang Qiu, Takahiro Sakayori, Satoshi Goto and Takeshi Ikenaga, "Motion Detection Based On Background Modeling And Performance Analysis For Outdoor Surveillance", International Conference on Computer modeling and simulation (ICCMS2009), Feb. 2009


  8. Wu Shuijiong, Huang Yiqing and Ikenaga Takeshi, "A Macroblock-Level Rate Control Algorithm for H.264/AVC Video Coding with Context-Adaptive MAD Prediction Model", International Conference on Computer modeling and simulation (ICCMS2009), Feb. 2009


  9. Guifen Tian, Tianruo Zhang, Takeshi Ikenaga, Satoshi Goto, "A Fast Hybrid Decision Algorithm for H.264/AVC Intra Prediction Based on Entropy Theory", MMM 2009, Sophia-Antipolis, France, LNCS 5371, pp.85?95, Jan.2009


  10. Wen Ji, Yata Abe, Takeshi Ikenaga, Satoshi Goto, "A High Performance LDPC Decoder for IEEE802.11n Standard", 14th Asia and South Pacific Design Automation Conference(ASP-DAC2009), Japan, pp. 127-128, Jan. 2009


  11. Nobuaki Tojo, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki, "Exact and Fast L1 Cache Simulation for Embedded Systems", IEEE ASP-DAC 2009, Yokohama, Japan, Jan., 2009


  12. Guifen Tian, Tianruo Zhang, Takeshi Ikenaga, Satoshi Goto,” A Fast Hybrid Decision Algorithm for H.264/AVC Intra Prediction Based on Entropy Theory”, MMM 2009, Sophia-Antipolis, France, LNCS 5371, pp.85?95, Jan.2009


  13. Yiqing Huang, Qin Liu, Takeshi Ikenaga, "Compressor Tree Based Processing Element Optimization in Propagate Partial Sad Architecture", IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS2008), Dec. 2008


  14. Guifen TIAN, Tianruo ZHANG, Satoshi GOTO, "A Block Type Decision Algorithm for H.264/AVC Intra Prediction Based on Entropy Feature", IEEE Asia Pacific Conference on Circuits and Systems(APCCAS2008), Macao, China, pp.1348-1351, Nov.2008


  15. Tianruo ZHANG, Guifen TIAN, Satoshi GOTO , "A Frequency-Based Fast Block Type Decision Algorithm for intra Prediction in H.264/AVC High Profile", IEEE Asia Pacific Conference on Circuits and Systems(APCCAS2008), Macao, China, pp. 1292-1295, Nov.2008


  16. Akiyuki Nagashima, Yuta Imai, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki, "Dynamically Reconfigurable Architecture for Multi-Rate Compatible Regular LDPC Decoding", IEEE APCCAS 2008, Macao Chaina, Nov., 2008


  17. Akira Ohchi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki, "High-level synthesis algorithms with floorplaning for distributed/shared-register architectures," ICCAD 2008, Nov., 2008.(Special Session)


  18. Shinsuke Ushiki, Koichi Nakamura, Kazunori Shimizu, Qi Wang, Yuta Abe, Satoshi Goto and Takeshi Ikenaga, "A 820 Mb/s Baseband Processor LSI based on LDPC Coded OFDM for UWB Systems", IEEE Asian Solid-State Circuits Conference (A-SSCC 2008), Nov. 2008


  19. Yibo FAN, Takeshi IKENAGA, Satoshi GOTO, "Optimized 2-D SAD Tree Architecture of Integer Motion Estimation for H.264/AVC", 16th IFIP/IEEE international conference on very large scale integration (VLSI-SoC 2008),Rhodes Island, Greece, pp.395-400, Oct. 2008


  20. Zhenxing CHEN, Qin LIU, Takeshi IKENAGA, Satoshi GOTO, "A Motion Vector Difference Based Self-Incremental Adaptive Search Range Algorithm for Variable Block Size Motion Estimation",ICIP2008, San Diego, U.S., pp.1998-1991, Oct.2008


  21. Zhenyu Liu, Satoshi Goto, Takeshi Ikenaga, "Optimization of Propagete Partial SAD and SAD Tree Motion Estimation Hardwired Engine for H.264", IEEE International Conference on Computer Design (ICCD 2008), Oct. 2008


  22. Qin Liu, Yiqing Huang, Takeshi Ikenaga, "Early Detection Algorithms for 8×8 All-Zero Blocks in H.264/AVC", IEEE 2008 International Workshop on Multimedia Signal Processing (MMSP-08), Oct. 2008


  23. Taeko MATSUNAGA, Shinji KIMURA, Yusuke MATSUNAGA, "Synthesis of Parallel Prefix Adders Considering Switching Activities," Proc. ICCD, pp.404-409, Oct. 2008


  24. Liangwei Ge, Song Chen, T.Yoshimura, "Automatic Implementation of Arithmetic Functions in High-Level Synthesis", Proc. ICSICT-2008, 2008.10


  25. Yibo FAN, Takeshi IKENAGA, Satoshi GOTO, "Fast VBSME design using reconfigurable hardware architecture and search range reduction algorithm”, The 10th IASTED International Conference on Signal and Image Processing (SIP 2008), Kailua-Kona, Hawaii, Aug. 2008


  26. Qin Liu, Yiqing Huang, and Takeshi Ikenaga, "4 x 4 SAD and SATD based all Zero Block Detection Algorithm in H.264/AVC", The 10th IASTED International Conference on Signal and Image Processing (SIP 2008), Aug. 2008


  27. Yiqing Huang, Qin Liu, and Takeshi Ikenaga, "Half Pixel Cost Distribution based Simplified Fractional Motion Estimation", The 10th IASTED International Conference on Signal and Image Processing (SIP 2008), Aug. 2008


  28. Qin Liu, Yiqing Huang, Takeshi Ikenaga, "Early Detection Algorithms for 4x4 and 8x8 All-Zero Blocks in H.264/AVC", 16th European Signal Processing Conference (EUSIPCO 2008), Aug. 2008


  29. Wenqi YOU, Yao MA, Yang SONG, Yan ZHUANG, Takeshi IKENAGA, Satoshi GOTO, "VLSI Oriented Group-based Algorithm for Multiple Reference Fractional Motion Estimation in H.264/AVC", SIP2008, Hawaii, U.S., Aug.2008


  30. Yibo FAN, Takeshi IKENAGA, Satoshi GOTO, "A Low-cost Reconfigurable Architecture for AES Algorithm", International Conference on Information and Communications Security (ICICS 2008), Prague, Czech Republic, pp.271-274 Jul.2008


  31. Tianruo ZHANG, Guifen TIAN, Takeshi IKENAGA, Satoshi GOTO, "A Novel Fast Block Type Decision Algorithm for Intra Prediction in H.264/AVC High Profile", The 23rd International Technical Conference on Circuits/Systems, Computers and Communications, Shimonoseki, Japan, pp.1-4, Jul.2008


  32. Wenming TANG, Wen JI, Xianghui WEI, Takeshi IKENAGA, Satoshi GOTO, "A Power-saving 1Gbps Irregular LDPC Decoder based on High-efficiency Message Passing "The 23rd International Technical Conference on Circuits/Systems, Computers and Communications　(ITC-CSCC), Shimonoseki, Japan, Jul.2008


  33. Jia Su, Qin Liu, Satoshi Goto, Takeshi Ikenaga, "8x8 transformation based all zero block detection for H.264/AVC encoder", The 23rd International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2008), July 2008


  34. Zheng Xu, Song Chen, T.Yoshimura and Y.Fang, "A New Implementation of Multilevel Framework for Interconnect-Driven Floorplanning", Proc. ITC-CSCC 2008,pp.185-188, 2008.7


  35. Lu Wang, Xiaolin Zhang, Song Chen, T.Yoshimura,"On Objective Functions for Fixed-Outline Floorplanning", Proc.ITC-CSCC 2008, pp569-572, 2008.7


  36. Liangwei Ge, Song Chen and T.Yoshimura, "Exploration of Schedule Space by Random Walk", Proc.ITC-CSCC 2008, pp1573-1576, 2008.7


  37. Liangwei Ge, Song Chen, Yuichi Nakamura and T.Yoshimura, "A Synthesis Method of General Floating-Point Arithmetic Units by Aligned Partition", Proc. ITC-CSCC 2008, pp.1177-1180, 2008.7


  38. Zhenyu Liu, Satoshi Goto, Takeshi Ikenaga, "Fast Motion Estimation for H.264/AVC Using Image Edge Features", IEEE International Conference on Multimedia & Expo (ICME 2008), June 2008


  39. Guifen TIAN, Tianruo ZHANG, Xianghui WEI, Takeshi IKENAGA, Satoshi GOTO, "An Efficient Fast Mode Decision Algorithm for H.264/AVC Intra Prediction", CISP, Hainan, China, May. Vol.1, pp.411-415, May.2008


  40. Qin Liu, Yiqing Huang, Satoshi Goto, Takeshi Ikenaga, "Aliasing Error Reduction Based Fast VBSME Algorithm", Congress on Image and Signal Processing (CISP 2008), May 2008


  41. Yiqing Huang, Qin Liu, Satoshi Goto, Takeshi Ikenaga, "Adaptive Subsampling and Motion Feature based Fast H.264 Motion Estimation", Congress on Image and Signal Processing (CISP 2008), May 2008


  42. Tianruo ZHANG, Shen LI, Guifen TIAN, Takeshi IKENAGA, Satoshi GOTO, "High Throughput VLSI Architecture of a Fast Mode Decision Algorithm for H.264/AVC Intra Prediction", International Conference on Communications, Circuits and Systems, Xiamen, China, pp.1383-1387, May.2008


  43. Wen JI, Yuta ABE, Takeshi IKENAGA, Satoshi GOTO, "A Cost-Efficient Partially-Parallel Irregular LDPC Decoder Based on Sum-Delta Message Passing Algorithm", GLSVLSI, Florida, USA, pp.207-212, May. 2008


  44. Yiqing Huang, Satoshi Goto, Takeshi Ikenaga, "VLSI Friendly Computation Reduction Scheme in H.264/AVC Motion Estimation", IEEE International Symposium on Circuits and Systems (ISCAS2008), May 2008


  45. Lei Chen, Takashi Horiyama, Yuichi Nakamura, Shinji Kimura, "Fine-Grained Power Gating Based on the Controlling Value of Logic Gates," 情処研報告 2008-SLDM-135, pp.55-60, May 2008


  46. Wen JI, Xing LI, Takeshi IKENAGA, Satoshi GOTO, "High Throughput Partially-Parallel Irregular LDPC Decoder Based on Delta-Value Message-Passing Schedule ", VLSI Design, Automation and Test, Hsinchu, Taiwan, pp.220-223, Apr. 2008


  47. Akira Ohchi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki, "High-level synthesis algorithms with floorplaning for distributed/shared-register architectures," VLSI-DAT 2008,pp. 164-167, Apr., 2008