≪2007年度≫
■成果発表
・原著論文発表(国内2件、国際13件)
- Xiang-hui Wei, Shen Li, Yang Song, Satoshi Goto, "An Irregular Search Window Reuse Scheme for MPEG-2 to H.264 Transcoding", IEICE Special Section on Signal Processing for Audio and Visual Systems and Its Implementaion, pp.749-755, Mar., 2008
- Yibo Fan, Jidong Wang, Takeshi Ikenaga, Yukiyasu Tsunoo, Satoshi Goto, "An Unequal Secure Encryption Scheme For H.264/AVC Video Compression Standard", IEICE Trans. Fundamentals, Vol. E91-A, No.1, pp. 12-21 Jan. 2008.
- Yao Ma, Yang Song, Takeshi Ikenaga, Satoshi Goto, "A High Throughput Multiple Transform Architecture for H.264/AVC Fidelity Range Extensions", Journal of Semiconductor Technology and Science, Vol.7, No.4, Dec., 2007
- Zhenyu Liu, Yang Song, Ming Shao, Shen Li, Lingfeng Li, Satoshi goto, Takeshi Ikenaga, "32-Parallel SAD Tree Hardwired Engine for Variable Block Size Motion Estimation in HDTV1080p Real-Time Encoding Application", IEEE Workshop on Signal Processing Systems (SiPS 2007), Oct. 2007.
- Yang Song, Ming Shao, Zhenyu Liu, Shen Li, Lingfeng Li, Takeshi Ikenaga, Satoshi Goto, "H.264/AVC Fractional Motion Estimation Engine with Computation Reusing in HDTV1080p Real-Time Encoding Applications", IEEE Workshop on Signal Processing Systems (SiPS 2007), Oct. 2007.
- Qi Wang, Kazunori Shimizu, Takeshi Ikenaga, Satoshi Goto, "Efficient Fully-Parallel LDPC Decoder Design with Improved Simplified Min-Sum Algorithms", IEICE Trans. Electron, Vol. E90-C, No. 10, pp. 1964-1971, Oct. 2007.
- Liangwei Ge, Song Chen, Kazutoshi Wakabayashi, Takashi Takenaka, Takeshi Yoshimura, "Max-flow Scheduling in High-level Synthesis", IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E90-A/9, 1940-1948, Sep., 2007
- 森隆寛, 外村 元伸, 大住 勇治, 後藤 敏, 池永 剛, "キュービック補間に基づく魚眼画像の高画質補正アルゴリズム及び専用ハードウェアエンジンの提案", 画像電子学会誌, Vol. 36, No. 9, pp.680-687, Sep., 2007
- 伊東 健, 中村 創, 後藤 敏, 池永 剛, "デジタルシネマ用JPEG 2000 エンコーダ向け並列CBMアルゴリズム及びLSI アーキテクチャ", 画像電子学会誌, Vol. 36, No. 9, pp.650-656, Sep., 2007
- Lingfeng Li, Yang Song, Shen Li, Takeshi Ikenaga, Satoshi Goto, "A Hardware Architecture of CABAC Encoding and Decoding with Dynamic Pipeline for H.264/AVC", The Journal of VLSI Signal Processing 2007, Springer Netherlands, Online Published in Aug., 2007
- Kazunori Shimizu, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto, "Power-Efficient LDPC Code Decoder Architecture", IEEE International Symposium on Low Power Electronics and Design (ISLPED 2007), Aug. 2007.
- Zhenyu Liu, Yang Song, Ming Shao, Shen Li, Lingfeng Li, Shunichi Ishiwata, Masaki Nakagawa, Satoshi Goto, Takeshi Ikenaga, "A 1.41W H.264/AVC Real-Time Encoder SOC for HDTV1080P", 2007 Symposium on VLSI Circuits, June 2007.
- Yang Song, Zhenyu Liu, Takeshi Ikenaga, Satoshi Goto, "Lossy Strict Multilevel Successive Elimination Algorithm for Fast Motion Estimation", IEICE Trans. Fundamentals, Vol.E91-A, No.4, pp.764-770, Apr., 2007
- Ming Shao, Zhenyu Liu, Satoshi Goto, Takeshi Ikenaga, "Lossless VLSI Oriented Full Computation Reusing Algorithm for H.264/AVC Fractional Motion Estimation", IEICE Trans. Fundamentals, Vol. E90-A, No. 4, pp. 756-763, Apr. 2007.
- Youhua Shi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki, "A Secure Test Technique for Pipelined Advanced Encryption Standard," IEICE Transactions on Information and Systems, vol. E91-D, no. 3, pp. 776-780, 2008.
|